“We will constantly be ‘within’ the internet, rather than have access to it, and within the billions of interconnected computers around us,” Ball wrote in his Metaverse Primer. Mark Zuckerberg described the metaverse similarly, calling it “an even more immersive and embodied internet.” Picture this: you strap on a headset or pair of goggles, flick a switch, and boom—you’re still standing in your living room, but you’re also walking through a 3D world as an avatar of yourself, and you can interact with other people who are doing the same thing from their living rooms.

Being constantly within the internet doesn’t sound all that appealing to me personally—in fact, it sounds pretty terrible—but the good news for those with a similar sentiment is that the “full vision” of the metaverse, according to Ball, is still decades away, primarily because of the advances in computing power, networking, and hardware necessary to enable and support it.

In fact, according to Raja Koduri, VP of Intel’s accelerated computing systems and graphics group, powering the metaverse will require a 1,000-fold improvement on the computational infrastructure we have today. “You need to access to petaflops [one thousand teraflops] of computing in less than a millisecond, less than ten milliseconds for real-time uses,” Koduri told Quartz. “Your PCs, your phones, your edge networks, your cell stations that have some compute, and your cloud computing need to be kind of working in conjunction like an orchestra.”

Stacking transistors could be the next big thing in chips.

IBM and Samsung have announced their latest advance in semiconductor design: a new way to stack transistors vertically on a chip (instead of lying flat on the surface of the semiconductor).

The new Vertical Transport Field Effect Transistors (VTFET) design is meant to succeed the current FinFET technology that’s used for some of today’s most advanced chips and could allow for chips that are even more densely packed with transistors than today. In essence, the new design would stack transistors vertically, allowing for current to flow up and down the stack of transistors instead of the side-to-side horizontal layout that’s currently used on most chips.

Vertical designs for semiconductors have been a trend for a while (FinFET already offers some of those benefits); Intel’s future roadmap also looks to move in that direction, too, although its initial work focused on stacking chip components rather than individual transistors. It makes sense, after all: when you’ve run out of ways to add more chips in one plane, the only real direction (other than physically shrinking transistor technology) is to go up.